Shape the future of digital designs at NXP as a Senior Mixed-Signal Design Engineer in Chandler, Arizona. Embrace a collaborative approach to develop complex SoCs.
This position requires someone well-versed in USB standards and RTL coding for mixed-signal designs. You will implement innovative digital IPs while collaborating closely with cross-functional teams, ensuring designs meet strict performance and power specifications. Contributing to synthesis and verification processes will be crucial to your success.
Key Responsibilities:
• Micro-architect digital features and implementations
• Conduct RTL design using Verilog/SystemVerilog
• Verify designs through simulations and debugging
• Engage in formal verification and timing analysis
• Prepare documentation and take part in design reviews
Requirements:
• Master’s degree with focus on Digital Design
• At least 3 years of relevant industry experience
• Willingness to relocate to the Phoenix Metro area