Mixed‑Signal Systems and Verification Engineer II

Responsibilities

• Be part of a hands‑on development team that promotes engineering excellence, creativity, and innovation.
• Develop accurate, simulation‑efficient analog and mixed‑signal behavioral models (RNM) in SystemVerilog.
• Verify that behavioral models accurately represent analog schematics and design intent.
• Integrate analog behavioral models with RTL environments.
• Verify analog and mixed‑signal functionality against specifications using:
• Assertions, including Analog Assertion‑Based Verification
• Support verification of blocks such as filters, ADC/DAC, VCO, A/DPLL, SerDes, LNA, mixers, and related AMS IP.
• Debug verification failures across analog, digital, and mixed‑signal domains.
• Develop and maintain verification infrastructure including testbenches, environments, and scripts.
• Document modeling assumptions, ver...