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Position Details
Responsibilities - Responsible for a team to design and develop critical analog, mixed‑signal, custom digital block and full chip level integration support.
- Manage a team to perform layout verification like LVS/DRC/antenna, quality check and documentation.
- Ensure on‑time delivery of block‑level layouts with acceptable quality.
- Coordinate and lead planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environments.
- Guide junior and senior team members in their execution of sub‑block‑level layouts and review their work.
- Effectively communicate with global engineering teams to assure the success of layout projects.
Minimum Qualifications - 10+ years of experience in analog/custom layout design in advanced CMOS processes, across various technology nodes (planar, FinFET).
- 2+ years of managing, coordinating or leading lay...