Digital Design Verification Engineers (x2) Your tasks and responsibilities
Responsible for design verification of integrated circuits, using both directed tests and constrained random regressionsPrimary focus is on digital design verification, but proficiency with mixed signal design verification and creation / validation of models are strong advantagesProficiency in System Verilog and UVM, including: writing checkers and assertions, customizing constraints, getting functional coverage collection using cover groups, etc.Technical and team leadership – both within the internal project DV team, but also directly supporting demanding customers.Creation of test benches and automated verification simulationsPerforming block level and top level design verificationGeneration of relevant documentation (DV Plan, DV execution plan, customer reviews, etc.) Your education and experiences
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